MSU Students Achieve Academic Chip Tapeout Using Intel 16 and Cadence Tools

Morgan State University Leads Silicon Innovation with Apple Grant and Industry Partnerships

Morgan State University (MSU) is taking bold steps to prepare the next generation of hardware engineers, thanks to a recent Apple Innovation Grant. The funding supports engineering programs nationwide and is fueling MSU’s New Silicon Initiative (NSI), an effort designed to inspire students and equip them with the skills needed for careers in hardware engineering, computer architecture, and silicon chip design.

At the heart of the initiative are dedicated faculty members like Dr. Kevin Kornegay, Eugene DeLoatch Endowed Professor in IoT. Leveraging the grant, Dr. Kornegay and his colleagues are creating immersive, hands-on learning experiences. They are inviting industry experts to guest lecture on advanced topics such as integrated circuit design and computer architecture, helping students bridge the gap between classroom theory and real-world practice.

The NSI curriculum builds progressively. Students begin with “Introduction to Electrical and Computer Engineering” (EEGR 105), gaining foundational skills in circuit design. The program culminates with its flagship course, “Tapeout Course in Digital Integrated Circuit Design” (EEGR 463)—a high-level class that mirrors a parallel course offered at UC Berkeley. Both schools share synchronized lectures, labs, and assignments, ensuring MSU students gain exposure to top-tier instruction.

“In collaboration with UC Berkeley and industry partners Cadence, Intel, and others, students enrolled in my EEGR 463 course at MSU are getting invaluable hands-on experience designing chips from RTL to fabrication. By leveraging the Intel 16 process and Cadence’s design tools, students take their ideas from concept to reality, setting themselves apart in the electronics industry.”
Kevin Kornegay, MSU

The course focuses on the tapeout process, the final design stage before chip manufacturing. In 2024, MSU student teams successfully completed a VLSI tapeout using Intel’s 16nm FinFET technology and Cadence’s advanced design flow, including Genus, Innovus, Tempus, and Pegasus tools. This milestone underscores the transformative impact of funding and industry support—giving students a competitive edge as they enter a rapidly growing field.

Industry-Grade Tools in the Classroom
One of the keys to success is making advanced technology accessible for student use within a semester-long timeframe. Intel’s 16nm class node serves as a gateway to FinFET design, offering simplified rules and compatibility with major electronic design automation (EDA) platforms. Through Intel’s University Shuttle Program, MSU students also gain early access to next-generation processes like Intel 18A, providing an unmatched opportunity to work with the same technologies used by top companies.

“Intel was glad to provide our PDKs to the MSU students so that they could fabricate their ideas on one of our latest processes, ensuring that students are familiar with the same processes that we and our customers utilize, setting them up for success.”
Bryan Casper, Intel Corp

Cadence also plays a crucial role by enabling universities to use professional-grade design software. Its Virtuoso Studio platform—including schematic, layout, simulation, and optimization tools—has been certified for Intel 16 technology. Students gain real-world experience with tools used across the industry, while benefiting from Cadence’s silicon-proven IP portfolio, covering PCIe 5.0, LPDDR5/4 memory interfaces, Ethernet PHYs, and more.

“Cadence is proud to partner with MSU and appreciates the work done in the labs to foster the next generation of semiconductor engineers. Having new college graduates with experience using the same commercial tools, flows, and processes as many of our customers enhances their productivity as incoming chip designers.”
David Sallard, Cadence

Shaping the Workforce of Tomorrow
The collaboration among MSU, Apple, Intel, Cadence, and UC Berkeley demonstrates the power of aligning academia with industry. With investments of time, resources, and cutting-edge technology, these partners are addressing a critical workforce shortage and creating a pipeline of skilled engineers ready to transform the semiconductor landscape.

Congratulations to MSU’s students and faculty for their successful tapeout—a tangible result of innovation, mentorship, and industry support. These achievements are not just classroom milestones; they are shaping the future of technology.

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