Chiplet Summit 2026 Announces Best of Show Awards, Highlighting Breakthroughs Across the Chiplet Ecosystem
The fourth annual Chiplet Summit, the industry’s largest conference dedicated exclusively to chiplet technologies, concluded at the Santa Clara Convention Center with the announcement of its highly anticipated 2026 Best of Show Awards. The awards recognize organizations whose innovations are helping drive the rapid adoption and evolution of chiplet-based architectures across the semiconductor landscape. As chiplets continue to reshape how advanced chips are designed, manufactured, and integrated, the summit’s winners represent key advances in packaging, interoperability, and system design.
This year’s event drew a broad cross-section of the semiconductor ecosystem, including chip designers, system architects, foundries, packaging specialists, and tool providers. The summit showcased the growing maturity of chiplet-based design approaches and underscored the technology’s increasing importance in areas such as artificial intelligence, high-performance computing, communications, and advanced memory solutions.
A Growing Focus on Chiplet Innovation
Chiplet technology has emerged as one of the most important trends in the semiconductor industry. Instead of building increasingly complex systems on a single monolithic die, companies are moving toward architectures that integrate multiple smaller dies—known as chiplets—within a single package. This approach enables improved yields, reduced costs, faster design cycles, and the ability to mix and match components built using different process nodes.
The Chiplet Summit serves as a focal point for these developments, providing a platform for industry leaders to share breakthroughs in design methodologies, packaging technologies, interconnect standards, and system-level integration. The Best of Show Awards, presented annually, aim to spotlight the most impactful innovations introduced at the conference.
According to Chuck Sobey, General Chair of the Chiplet Summit, this year’s submissions demonstrated the depth and diversity of innovation across the ecosystem.
Chiplet innovation is everywhere,” Sobey said. “We received a wide range of compelling submissions that highlighted advances in design, interoperability, and packaging. We congratulate our winners on their leadership and technical excellence.”
2026 Best of Show Award Winners
The 2026 awards were presented across three key categories reflecting the major pillars of chiplet-based system development: design, connectivity, and hardware packaging.
Packaging: Design — Siemens EDA
The award for Packaging: Design was presented to Siemens EDA for its Innovator3D IC software. The tool enables rapid planning and integration of application-specific integrated circuits (ASICs) and chiplets using advanced 2.5D and 3D packaging technologies.
As chiplet-based systems become more complex, designers must consider factors such as thermal management, signal integrity, power distribution, and physical layout across multiple dies. Traditional electronic design automation (EDA) tools were not built to handle the intricacies of heterogeneous integration, where chiplets manufactured on different process nodes and even at different foundries must work together seamlessly.
Innovator3D IC addresses these challenges by providing a unified platform for planning and optimizing chiplet-based packages. The software allows engineers to visualize system-level layouts, evaluate tradeoffs, and ensure that interconnects, power delivery, and thermal performance meet design requirements. By streamlining the planning phase, the tool helps reduce development cycles and minimize costly redesigns.
The recognition highlights the growing importance of advanced EDA solutions as the semiconductor industry transitions toward chiplet-based system architectures.
Connectivity and Interoperability — UCIe Consortium
The award for Connectivity and Interoperability went to the UCIe Consortium for its UCIe 3.0 specification. UCIe, or Universal Chiplet Interconnect Express, is an open standard designed to enable high-speed, interoperable communication between chiplets within a package.
Interconnect standards are a critical component of the chiplet ecosystem. Without common interfaces, chiplets from different vendors cannot easily work together, limiting the benefits of modular design. UCIe was created to solve this challenge by providing a standardized, high-bandwidth, low-latency interface for chiplet communication.
The newly recognized UCIe 3.0 specification delivers higher performance to meet the growing demands of AI, data center, and high-performance computing applications. As workloads become more data-intensive, the need for faster communication between chiplets becomes increasingly important.
By advancing the UCIe standard, the consortium is helping build a more open and flexible ecosystem in which chiplets from multiple vendors can interoperate. This approach mirrors the success of earlier industry standards, such as PCI Express and USB, which enabled widespread compatibility and innovation across the computing landscape.
The award underscores the importance of open standards in accelerating chiplet adoption and enabling new classes of modular, scalable systems.
Packaging: Hardware — Sarcina Technology
The Packaging: Hardware award was presented to Sarcina Technology for its advanced chiplet-based AI package design. The company’s solution focuses on delivering scalable, high-bandwidth systems through turnkey packaging and test services.
AI workloads demand enormous data throughput and efficient communication between processing elements. Chiplet-based architectures offer a path to achieving these requirements by combining multiple compute, memory, and accelerator chiplets within a single package.
Sarcina Technology’s approach allows customers to deploy advanced chiplet-based AI systems without the need to build their own packaging infrastructure. By offering end-to-end packaging and test services, the company lowers the barriers to entry for organizations looking to adopt chiplet-based designs.
This turnkey model is particularly attractive for startups, research institutions, and companies transitioning from monolithic designs to chiplet architectures. It enables them to leverage advanced packaging technologies without the significant capital investments typically required.
The award reflects the growing role of packaging specialists in the semiconductor value chain, as advanced packaging becomes a key differentiator in system performance.
The Broader Impact of Chiplet-Based Design
The technologies recognized at the 2026 Chiplet Summit highlight the three major forces shaping the chiplet ecosystem: advanced design tools, open interconnect standards, and innovative packaging solutions.
Together, these elements are enabling a shift from traditional monolithic chip design to modular, heterogeneous systems. This transition offers several advantages:
Improved yield and cost efficiency
Smaller chiplets are easier to manufacture with higher yields compared to large monolithic dies. This reduces overall production costs, particularly at advanced process nodes.
Design flexibility
Chiplets allow designers to combine components built using different process technologies. For example, a high-performance compute chiplet may use a cutting-edge node, while analog or I/O chiplets may use more mature, cost-effective processes.
Faster time to market
Reusable chiplets can shorten design cycles by allowing companies to integrate pre-validated components instead of designing entire systems from scratch.
Scalability
Chiplet-based systems can be scaled by adding or removing chiplets to meet specific performance, power, or cost targets.
These advantages are driving adoption across a wide range of applications, including AI accelerators, high-performance computing systems, networking equipment, and advanced memory architectures.
The Role of Chiplet Summit
Chiplet Summit, produced by Semper Technologies, has become a central gathering point for professionals working with chiplet technologies. The event focuses on practical engineering challenges and real-world deployments, bringing together experts from across the semiconductor ecosystem.
Unlike broader semiconductor conferences, Chiplet Summit is dedicated entirely to chiplet-related topics. Sessions typically cover areas such as:
- Chiplet architecture and system design
- Advanced packaging technologies
- Interconnect standards
- Thermal and power management
- Testing and validation
- Supply chain considerations
The summit serves technologists designing processors, memory systems, communications chips, and AI devices, reflecting the wide range of applications benefiting from chiplet-based approaches.
